STMicroelectronics and the University of Singapore open HELIX, a four-year lab on embedded AI chips

The joint lab wants to run generative and embodied AI on energy-constrained components, relying on 18 nm FD-SOI and phase-change memory.

Launched on August 24, 2026, the ST-NUS HELIX enterprise laboratory brings together semiconductor manufacturer STMicroelectronics and the National University of Singapore for four years. The acronym — Hardware for Embodied Low-power Intelligent Xcceleration — says the goal: to design hardware capable of running generative models and embodied AI systems directly on robots, humanoids or drones, without depending on a permanent link to the cloud.

The program is based on two ST technology building blocks: the 18 nm FD-SOI process and embedded phase-change memory. The guiding idea is to bring computing closer to memory — memory-centric architectures and in-memory computing — to eliminate off-chip data round-trips, which account for most of the consumption in inference loads.

The laboratory is hosted by the College of Design and Engineering, with the participation of the School of Computing, and benefits from the national research plan RIE2025. In addition to circuit and accelerator design work, it has a training component designed to supply the Singaporean semiconductor ecosystem with engineers.