The former Crescent Island has become the Intel GPU D-series: 1.3 petaflops in FP8, 1.5 TB/s of bandwidth and a massive amount of memory capable of handling models with 300 billion parameters on a single card.
Presented in 2025 as Crescent Island Code, Intel's new inference map received its trade name at the top of the Open Compute Project: Intel GPU D-series. Based on the Xe3P architecture (32 Xe cores, 256 XMX engines), it delivers 1.3 FP8 petaflops with 1.5TB/s bandwidth, in a 350W air-cooled envelope in standard PCIe format. The first samples are in the hands of server builders, neoclouds and software editors; the first visible model bears the reference D270.
Capacity rather than flow
Intel's bet is to replace expensive HBM memory with LPDDR5X: 160 GB on home card, up to 480 GB on partner-designed versions. A single card could host a model of about 300 billion parameters, and an eight-GPU server could exceed trillion. The bandwidth remains much lower than that of the HBM accelerators — and even that of the Gaudi 3 (3,7TB/s) — but Intel estimates that for long-term agents whose KV cache is constantly swelling, it is the capacity per watt and per dollar that counts.
The manufacturer also showed OCP Open Rack v3 bays built around the Xeon 6+, announced at more than 46,000 cores for 133.45 kW, intended for the "CPU" work of agent pipelines: routing, documentary research, code execution. About 50 partners, from Dell to Hugging Face via vLLM and Red Hat, are included in the announced ecosystem.
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