Custom HBM memory for Nvidia: Samsung entrusts the base chip to TSMC for the first time, manufactured using a 3 nm process

For Nvidia’s NVHBM memory, Samsung will manufacture the DRAM layers but will have TSMC etch the base logic chip using a 3 nm process, as it lacks sufficient in-house capacity and yield rates.

Samsung Electronics and TSMC will work together on the high-bandwidth memory designed specifically for Nvidia, called NVHBM. The division of tasks is unprecedented: Samsung will produce the stacked memory chips, while the "base die", the logical layer that drives data exchanges, will be engraved by TSMC on its 3-nanometer process. This is the first time that Samsung has subcontracted this part to its Taiwanese competitor.

Why TSMC

According to the Seoul Economic Daily, Nvidia has favored TSMC for its 3 nm efficiencies, which are above 90%, while Samsung Foundry's 2 nm yields are around 60%. Samsung's 4 nm lines dedicated to base chips would not have the capacity to absorb custom memory volumes anyway. TSMC is planning two new 3 nm lines in its Fab 18 in Tainan (in mid-2027 and mid-2028), then in Arizona and Kumamoto in Japan.

What NVHBM changes

The particularity of this memory is that it integrates the memory controller, which until now has been housed in the GPU, which frees up surface area for calculation. Compared to a standard HBM4E, Nvidia would aim for 30% more bandwidth and 15% less consumption. The context remains tense: demand for HBM is expected to jump by 91% next year, with an estimated supply deficit of around 10%.